rustv - A minimal, intentionally inaccurate RISC-V ISA simulator in Rust

Branch	Commit message	Author	Age
master	chore(Changelog): add clog config	David Li	8 years

Tag	Download	Author	Age
0.5.1	commit bf95ae676d...	David Li	8 years
0.5.0	commit 657d1fb5aa...	David Li	8 years
0.4.1	commit 4a56b90b38...	David Li	8 years
0.2.5	commit 7a3dae00d7...	David Li	8 years

Age	Commit message	Author	Files	Lines
2016-01-15	Bump version to 0.5.00.5.0	David Li	1	-1/+1
2016-01-15	Allow stalls that do not retry instruction	David Li	4	-7/+18
2016-01-14	Add as_bytes to IsaType	David Li	1	-0/+25
2016-01-14	Implement Hash, Display for IsaTypes	David Li	1	-1/+7
2016-01-14	Fix tests	David Li	2	-54/+58
2016-01-14	Convert ISA types to newtype structs	David Li	6	-202/+261
2016-01-13	Pass MMU to syscall handler	David Li	2	-2/+6
2016-01-11	Bump version to 0.4.10.4.1	David Li	1	-1/+1
2016-01-11	Correct ReverseMmu (map 0 to present address)	David Li	1	-1/+1
2016-01-11	Fix BGE, BGEU, funct3 calculation	David Li	2	-3/+3
[...]

Clone
https://git.lidavidm.me/rustv