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authorDavid Li <li.davidm96@gmail.com>2016-01-10 09:48:00 -0700
committerDavid Li <li.davidm96@gmail.com>2016-01-10 09:48:00 -0700
commitcaeedd93fff2028c4350a38713fb81dc8f6251fb (patch)
tree0dc7f25af6364bffb5c13455d22abee104f0a5ab /src
parent5f02de7d841310e7bc155e24aecbea8dd2ec1df0 (diff)
Update TODOs, memory layout
Diffstat (limited to 'src')
-rw-r--r--src/main.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main.rs b/src/main.rs
index 1745084..ff5ed3a 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -87,13 +87,13 @@ fn main() {
let mut cores = vec![];
for i in 0..4 {
let mut core = simulator::Core::new(
- i, start1, (0x1000 + i * 0x1000) as u32, cache1.clone(),
+ i, start1, (0x100000 * (i + 1)) as u32, cache1.clone(),
Box::new(memory::IdentityMmu::new())
);
core.registers().write_word(isa::Register::X10, i as isa::Word);
cores.push(core);
let mut core = simulator::Core::new(
- i, start2, (0x1000 + i * 0x1000) as u32, cache2.clone(),
+ i, start2, (0x100000 * (i + 1)) as u32, cache2.clone(),
Box::new(memory::ReverseMmu::new(0x4000000))
);
core.registers().write_word(isa::Register::X10, i as isa::Word);