Age | Commit message (Expand) | Author | Files | Lines |
2016-01-24 | Provide API to react to cache events | David Li | 4 | -243/+301 |
2016-01-17 | Distinguish between memory and cache at type level | David Li | 2 | -3/+45 |
2016-01-16 | Have simulator return reason for halting | David Li | 2 | -14/+29 |
2016-01-15 | Allow stalls that do not retry instruction | David Li | 4 | -7/+18 |
2016-01-14 | Add as_bytes to IsaType | David Li | 1 | -0/+25 |
2016-01-14 | Implement Hash, Display for IsaTypes | David Li | 1 | -1/+7 |
2016-01-14 | Fix tests | David Li | 2 | -54/+58 |
2016-01-14 | Convert ISA types to newtype structs | David Li | 6 | -202/+261 |
2016-01-13 | Pass MMU to syscall handler | David Li | 2 | -2/+6 |
2016-01-11 | Correct ReverseMmu (map 0 to present address) | David Li | 1 | -1/+1 |
2016-01-11 | Fix BGE, BGEU, funct3 calculation | David Li | 2 | -3/+3 |
2016-01-09 | Step caches separately from cores | David Li | 1 | -2/+7 |
2016-01-09 | Add core_id to core, syscalls | David Li | 2 | -7/+16 |
2016-01-09 | Fix ReverseMmu address translation | David Li | 1 | -1/+2 |
2016-01-09 | Remove old elfloader test | David Li | 1 | -80/+0 |
2016-01-08 | Add MemoryInterface.is_address_accessible | David Li | 1 | -0/+13 |
2016-01-07 | Always provide stall report | David Li | 1 | -6/+12 |
2016-01-07 | Avoid cache deadlock | David Li | 1 | -2/+2 |
2016-01-07 | Implement SH/LH/LHU | David Li | 1 | -4/+10 |
2016-01-07 | Implement halfword access | David Li | 2 | -6/+58 |
2016-01-07 | Let API user handle syscalls | David Li | 5 | -69/+164 |
2016-01-06 | Bump version to 0.2.50.2.5 | David Li | 1 | -1/+0 |
2016-01-06 | Implement LUI, AUIPC | David Li | 3 | -0/+13 |
2016-01-06 | Implement LB, SB, LBU | David Li | 2 | -52/+76 |
2016-01-06 | Correct s_imm calculation | David Li | 1 | -2/+2 |
2016-01-06 | Fix default read_instruction implementation | David Li | 1 | -1/+1 |
2016-01-06 | Get rid of Box in memory refs | David Li | 3 | -32/+44 |
2016-01-05 | Upload elfloader separately | David Li | 2 | -5/+10 |
2016-01-05 | Rename elfloader crate | David Li | 3 | -3/+3 |
2016-01-05 | Re-export elfloader | David Li | 1 | -1/+4 |
2016-01-05 | Update copyright | David Li | 8 | -8/+8 |
2016-01-04 | Enable loading with address translation | David Li | 2 | -15/+27 |
2016-01-04 | Get rid of unused code | David Li | 2 | -9/+4 |
2016-01-04 | Make memory construction from segments a method instead | David Li | 2 | -22/+7 |
2016-01-04 | Fix cache sharing bug | David Li | 3 | -16/+26 |
2016-01-04 | Load ELF directly | David Li | 3 | -38/+29 |
2016-01-04 | Implement initializing memory from text/data segments | David Li | 4 | -11/+89 |
2016-01-04 | Add rust-elfloader to tree (needs modification for 32-bit ELF) | David Li | 8 | -0/+1266 |
2016-01-03 | Add MMU to core | David Li | 3 | -7/+49 |
2016-01-03 | Test writing with cache miss | David Li | 1 | -4/+21 |
2016-01-03 | Test reading and writing cache and memory | David Li | 1 | -0/+35 |
2016-01-03 | Write value to cache as well | David Li | 1 | -35/+43 |
2016-01-03 | Fix write_byte, add basic tests | David Li | 2 | -5/+25 |
2016-01-03 | Add write_word, read_byte, write_byte | David Li | 1 | -6/+50 |
2016-01-02 | Use type alias to clean up signatures | David Li | 1 | -10/+7 |
2016-01-01 | Make MMU a trait for API user to implement | David Li | 1 | -3/+2 |
2016-01-01 | Test use of cache in simulation | David Li | 3 | -12/+34 |
2016-01-01 | Finish read_word for cache | David Li | 1 | -6/+17 |
2015-12-31 | Finish DirectMappedCache.step | David Li | 2 | -19/+27 |
2015-12-31 | Sketch impl of cache step | David Li | 1 | -2/+60 |