aboutsummaryrefslogtreecommitdiff
path: root/src/simulator.rs
diff options
context:
space:
mode:
authorDavid Li <li.davidm96@gmail.com>2016-01-15 17:21:00 -0700
committerDavid Li <li.davidm96@gmail.com>2016-01-15 17:21:00 -0700
commit05a9968d6dafb31d0e33590d80f6eb364de50d8a (patch)
treea9ae8ef56a9d64a1405e5540dcb62df2b1c72b80 /src/simulator.rs
parent4567214f23a63b4e4964433f4034240cc4fa6a4b (diff)
Allow stalls that do not retry instruction
Diffstat (limited to 'src/simulator.rs')
-rw-r--r--src/simulator.rs12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/simulator.rs b/src/simulator.rs
index 63b5eec..41331ef 100644
--- a/src/simulator.rs
+++ b/src/simulator.rs
@@ -290,9 +290,11 @@ impl<'a> Core<'a> {
match result {
Ok(value) => self.registers.write_word(inst.rd(), value),
- Err(MemoryError::CacheMiss { stall_cycles }) => {
+ Err(MemoryError::CacheMiss { stall_cycles, retry }) => {
self.stall = stall_cycles - 1;
- return; // don't increment PC
+ if retry {
+ return; // don't increment PC
+ }
},
Err(MemoryError::InvalidAddress) => {
self.trap(Trap::IllegalRead {
@@ -325,9 +327,11 @@ impl<'a> Core<'a> {
match result {
Ok(()) => (),
- Err(MemoryError::CacheMiss { stall_cycles }) => {
+ Err(MemoryError::CacheMiss { stall_cycles, retry }) => {
self.stall = stall_cycles - 1;
- return; // don't increment PC
+ if retry {
+ return; // don't increment PC
+ }
},
Err(MemoryError::InvalidAddress) => {
self.trap(Trap::IllegalWrite {