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authorDavid Li <li.davidm96@gmail.com>2015-12-18 21:20:36 -0500
committerDavid Li <li.davidm96@gmail.com>2015-12-18 21:20:36 -0500
commitfd582a1cbd091576701d12e886d9ad91527320f9 (patch)
tree1b1a2d1cb32cbdb51765939f3a41790e05cc5d8f /src/isa/mod.rs
parenteaf81f3ea63098a908476d05886c8f00ac7e9389 (diff)
Implement RV32I integer-register instructions
Diffstat (limited to 'src/isa/mod.rs')
-rw-r--r--src/isa/mod.rs17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/isa/mod.rs b/src/isa/mod.rs
index b34d701..ebfd4e8 100644
--- a/src/isa/mod.rs
+++ b/src/isa/mod.rs
@@ -1,5 +1,6 @@
pub mod opcodes;
pub mod funct3;
+pub mod funct7;
#[derive(Debug, PartialEq)]
pub enum Register {
@@ -81,6 +82,7 @@ impl Register {
}
}
+#[derive(Copy, Clone, Debug)]
pub struct Instruction {
word: u32,
}
@@ -104,11 +106,26 @@ impl Instruction {
(self.word >> 12) & 0x3
}
+ pub fn funct7(&self) -> u32 {
+ (self.word >> 25) & 0x7F
+ }
+
pub fn rs1(&self) -> Register {
Register::from_num((self.word >> 15) & 0x1F)
}
+ pub fn rs2(&self) -> Register {
+ Register::from_num((self.word >> 20) & 0x1F)
+ }
+
pub fn i_imm(&self) -> i32 {
(self.word as i32) >> 20
}
+
+ pub fn s_imm(&self) -> i32 {
+ let word = self.word as i32;
+ let low = (word >> 7) & 0x1F;
+ let high = (word >> 25) & 0x7F;
+ (high << 7) | low
+ }
}