From 85d83e42294c952eca0dd8efd7baf55fe6af15df Mon Sep 17 00:00:00 2001 From: David Li Date: Sun, 3 Jan 2016 10:24:14 -0700 Subject: Add write_word, read_byte, write_byte --- src/memory.rs | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 50 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/memory.rs b/src/memory.rs index 5092f55..22d9bce 100644 --- a/src/memory.rs +++ b/src/memory.rs @@ -48,8 +48,43 @@ pub trait MemoryInterface { // fn read_halfword(&self, address: isa::Address) -> Result; // fn write_halfword(&self, address: isa::Address) -> Result<()>; - // fn read_byte(&self, address: isa::Address) -> Result; - // fn write_byte(&self, address: isa::Address) -> Result<()>; + fn read_byte(&mut self, address: isa::Address) -> Result { + let result = self.read_word(address); + let offset = address % 4; + + match result { + Ok(word) => match offset { + 0 => Ok((word & 0xFF) as isa::Byte), + 1 => Ok((word & 0xFF00) as isa::Byte), + 2 => Ok((word & 0xFF0000) as isa::Byte), + 3 => Ok((word & 0xFF000000) as isa::Byte), + _ => panic!(""), + }, + Err(e) => Err(e), + } + } + + fn write_byte(&mut self, address: isa::Address, value: isa::Byte) -> Result<()> { + let address = address / 4; + let offset = address % 4; + + let result = self.read_word(address); + let value = value as isa::Word; + + match result { + Ok(word) => { + match offset { + 0 => (word & !(0xFF)) | value, + 1 => (word & !(0xFF00)) | (value << 8), + 2 => (word & !(0xFF0000)) | (value << 16), + 3 => (word & !(0xFF000000)) | (value << 24), + _ => panic!(""), + }; + Ok(()) + }, + Err(e) => Err(e), + } + } } pub type SharedMemory<'a> = Rc>>; @@ -191,7 +226,7 @@ impl<'a> DirectMappedCache<'a> { impl<'a> MemoryInterface for DirectMappedCache<'a> { fn latency(&self) -> u32 { - 100 + 0 } fn step(&mut self) { @@ -240,7 +275,7 @@ impl<'a> MemoryInterface for DirectMappedCache<'a> { fn read_word(&mut self, address: isa::Address) -> Result { let normalized = self.normalize_address(address); let (new_tag, _, _) = self.parse_address(address); - let stall = self.latency(); + let stall = self.next_level.borrow().latency(); let (tag, index, offset) = self.parse_address(address); let ref mut set = self.cache[index as usize]; @@ -286,7 +321,16 @@ impl<'a> MemoryInterface for DirectMappedCache<'a> { fn write_word(&mut self, address: isa::Address, value: isa::Word) -> Result<()> { - // XXX: temporary - self.next_level.borrow_mut().write_word(address, value) + // Write-allocate policy + match self.read_word(address) { + Ok(_) => { + // Write-through policy + match self.next_level.borrow_mut().write_word(address, value) { + Ok(()) => Ok(()), + Err(e) => Err(e), + } + }, + Err(e) => Err(e), + } } } -- cgit v1.2.3