From 6abcabdc03a1aa6072481fb825442c282836101c Mon Sep 17 00:00:00 2001
From: David Li <li.davidm96@gmail.com>
Date: Tue, 29 Dec 2015 15:18:05 -0700
Subject: Don't give cache ownership of memory

---
 src/lib.rs    | 11 ++++++++---
 src/memory.rs |  9 ++++++---
 2 files changed, 14 insertions(+), 6 deletions(-)

(limited to 'src')

diff --git a/src/lib.rs b/src/lib.rs
index b77d4f7..ac87f77 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -25,7 +25,8 @@ fn it_works() {
     use std::path::Path;
     match binary::Binary::new_from_hex_file(Path::new("../riscv/kernel.hex")) {
         Ok(b) => {
-            let mut simulator = simulator::Simulator::new(1, b);
+            let memory = memory::Memory::new_from_binary(0x2000, b);
+            let mut simulator = simulator::Simulator::new(1, memory);
             simulator.run();
         },
         Err(err) => println!("Error: {:?}", err),
@@ -37,9 +38,13 @@ mod tests {
     #[test]
     fn cache_address_parsing() {
         use memory::*;
+        use std::rc::Rc;
+        use std::cell::RefCell;
 
-        let dm_cache_word = DirectMappedCache::new(4, 1, Memory::new(1));
-        let dm_cache_doubleword = DirectMappedCache::new(4, 2, Memory::new(1));
+        let memory = Memory::new(16);
+        let memory_ref = Rc::new(RefCell::new(memory));
+        let dm_cache_word = DirectMappedCache::new(4, 1, memory_ref.clone());
+        let dm_cache_doubleword = DirectMappedCache::new(4, 2, memory_ref.clone());
 
         assert_eq!(dm_cache_word.parse_address(0xFFFFFFFD),
                    (0xFFFFFFF, 3, 1));
diff --git a/src/memory.rs b/src/memory.rs
index d321711..9f606e4 100644
--- a/src/memory.rs
+++ b/src/memory.rs
@@ -14,6 +14,9 @@
 // You should have received a copy of the GNU General Public License
 // along with rustv.  If not, see <http://www.gnu.org/licenses/>.
 
+use std::rc::Rc;
+use std::cell::RefCell;
+
 use isa::{self, Instruction};
 use binary::{Binary};
 
@@ -71,7 +74,7 @@ pub struct DirectMappedCache<T: MemoryInterface> {
     num_sets: u32,
     block_words: u32,
     cache: Vec<CacheBlock>,
-    next_level: T,
+    next_level: Rc<RefCell<T>>,
 }
 
 impl Memory {
@@ -126,7 +129,7 @@ impl MemoryInterface for Memory {
 }
 
 impl<T: MemoryInterface> DirectMappedCache<T> {
-    pub fn new(sets: u32, block_words: u32, next_level: T)
+    pub fn new(sets: u32, block_words: u32, next_level: Rc<RefCell<T>>)
                -> DirectMappedCache<T> {
         let set = CacheBlock {
             valid: false,
@@ -202,6 +205,6 @@ impl<T: MemoryInterface> MemoryInterface for DirectMappedCache<T> {
     fn write_word(&mut self, address: isa::Address, value: isa::Word)
                   -> Result<()> {
         // XXX: temporary
-        self.next_level.write_word(address, value)
+        self.next_level.borrow_mut().write_word(address, value)
     }
 }
-- 
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