From 692f250415859aea37794a1d20d89c44e62c83e3 Mon Sep 17 00:00:00 2001 From: David Li Date: Sun, 24 Jan 2016 16:05:38 -0500 Subject: Get rid of redundant 'Cache' in names --- src/cache.rs | 20 ++++++++++---------- src/lib.rs | 6 +++--- 2 files changed, 13 insertions(+), 13 deletions(-) (limited to 'src') diff --git a/src/cache.rs b/src/cache.rs index 57bda25..8b7145a 100644 --- a/src/cache.rs +++ b/src/cache.rs @@ -57,20 +57,20 @@ struct FetchRequest { } #[derive(Clone)] -struct CacheBlock { +struct Block { valid: bool, tag: u32, contents: Vec, fetch_request: Option, } -pub trait CacheEventHandler { +pub trait EventHandler { fn block_fetched(&self, location: CacheLocation); } -pub struct EmptyCacheEventHandler {} +pub struct EmptyEventHandler {} -impl CacheEventHandler for EmptyCacheEventHandler { +impl EventHandler for EmptyEventHandler { fn block_fetched(&self, _: CacheLocation) {} } @@ -78,19 +78,19 @@ impl CacheEventHandler for EmptyCacheEventHandler { // investigate how LRU is implemented // TODO: use hashtable for a way? // TODO: hashtable-based FA cache? -pub struct DirectMappedCache<'a, T: CacheEventHandler> { +pub struct DirectMappedCache<'a, T: EventHandler> { num_sets: u32, block_words: u32, - cache: Vec, + cache: Vec, next_level: SharedMemory<'a>, events: T, } -impl<'a, T: CacheEventHandler> DirectMappedCache<'a, T> { +impl<'a, T: EventHandler> DirectMappedCache<'a, T> { pub fn new(sets: u32, block_words: u32, next_level: SharedMemory<'a>, events: T) -> DirectMappedCache<'a, T> { - let set = CacheBlock { + let set = Block { valid: false, tag: 0, contents: vec![isa::Word(0); block_words as usize], @@ -124,7 +124,7 @@ impl<'a, T: CacheEventHandler> DirectMappedCache<'a, T> { } } -impl<'a, T: CacheEventHandler> MemoryInterface for DirectMappedCache<'a, T> { +impl<'a, T: EventHandler> MemoryInterface for DirectMappedCache<'a, T> { fn latency(&self) -> u32 { 0 } @@ -263,7 +263,7 @@ impl<'a, T: CacheEventHandler> MemoryInterface for DirectMappedCache<'a, T> { } } -impl<'a, T: CacheEventHandler> CacheInterface for DirectMappedCache<'a, T> { +impl<'a, T: EventHandler> CacheInterface for DirectMappedCache<'a, T> { fn cache_metadata(&self) -> CacheMetadata { let tags = { let mut tags = Vec::new(); diff --git a/src/lib.rs b/src/lib.rs index a4def64..2ac7230 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -41,9 +41,9 @@ mod tests { let memory = Memory::new(16); let memory_ref = Rc::new(RefCell::new(memory)); let dm_cache_word = DirectMappedCache::new( - 4, 1, memory_ref.clone(), EmptyCacheEventHandler {}); + 4, 1, memory_ref.clone(), EmptyEventHandler {}); let dm_cache_doubleword = DirectMappedCache::new( - 4, 2, memory_ref.clone(), EmptyCacheEventHandler {}); + 4, 2, memory_ref.clone(), EmptyEventHandler {}); assert_eq!(dm_cache_word.parse_address(Word(0xFFFFFFFD)), (0xFFFFFFF, 3, 1)); @@ -110,7 +110,7 @@ mod tests { let memory_ref = Rc::new(RefCell::new(memory)); let mut dm_cache = DirectMappedCache::new( - 4, 4, memory_ref.clone(), EmptyCacheEventHandler {}); + 4, 4, memory_ref.clone(), EmptyEventHandler {}); assert_eq!(dm_cache.read_word(Word(0x10)), stall); -- cgit v1.2.3