From 6abcabdc03a1aa6072481fb825442c282836101c Mon Sep 17 00:00:00 2001
From: David Li
Date: Tue, 29 Dec 2015 15:18:05 -0700
Subject: Don't give cache ownership of memory
---
src/memory.rs | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
(limited to 'src/memory.rs')
diff --git a/src/memory.rs b/src/memory.rs
index d321711..9f606e4 100644
--- a/src/memory.rs
+++ b/src/memory.rs
@@ -14,6 +14,9 @@
// You should have received a copy of the GNU General Public License
// along with rustv. If not, see .
+use std::rc::Rc;
+use std::cell::RefCell;
+
use isa::{self, Instruction};
use binary::{Binary};
@@ -71,7 +74,7 @@ pub struct DirectMappedCache {
num_sets: u32,
block_words: u32,
cache: Vec,
- next_level: T,
+ next_level: Rc>,
}
impl Memory {
@@ -126,7 +129,7 @@ impl MemoryInterface for Memory {
}
impl DirectMappedCache {
- pub fn new(sets: u32, block_words: u32, next_level: T)
+ pub fn new(sets: u32, block_words: u32, next_level: Rc>)
-> DirectMappedCache {
let set = CacheBlock {
valid: false,
@@ -202,6 +205,6 @@ impl MemoryInterface for DirectMappedCache {
fn write_word(&mut self, address: isa::Address, value: isa::Word)
-> Result<()> {
// XXX: temporary
- self.next_level.write_word(address, value)
+ self.next_level.borrow_mut().write_word(address, value)
}
}
--
cgit v1.2.3