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path: root/src/simulator.rs
AgeCommit message (Expand)AuthorFilesLines
2016-01-07Let API user handle syscallsDavid Li1-50/+14
2016-01-06Implement LUI, AUIPCDavid Li1-0/+7
2016-01-06Implement LB, SB, LBUDavid Li1-49/+67
2016-01-06Get rid of Box in memory refsDavid Li1-24/+39
2016-01-05Update copyrightDavid Li1-1/+1
2016-01-04Fix cache sharing bugDavid Li1-13/+17
2016-01-04Load ELF directlyDavid Li1-6/+2
2016-01-03Add MMU to coreDavid Li1-4/+14
2016-01-02Use type alias to clean up signaturesDavid Li1-10/+7
2016-01-01Test use of cache in simulationDavid Li1-2/+23
2015-12-31Finish DirectMappedCache.stepDavid Li1-0/+1
2015-12-31Refactor Core.step slightlyDavid Li1-223/+221
2015-12-30Convert simulator to using cacheDavid Li1-78/+89
2015-12-29Don't give simulator ownership of binaryDavid Li1-2/+3
2015-12-29Update test for new cacheDavid Li1-1/+1
2015-12-27Add GPLv3 licenseDavid Li1-0/+16
2015-12-27Include fetch requests in cacheDavid Li1-1/+1
2015-12-26Reenable jump/branch instructionsDavid Li1-37/+39
2015-12-25Convert PC to u32David Li1-4/+5
2015-12-25Add trait for memory interfaceDavid Li1-18/+30
2015-12-20Fix immediate calculation in JALDavid Li1-38/+40
2015-12-20Merge branch 'master' of git.lidavidm.me:rustvDavid Li1-29/+58
2015-12-20Try handling syscallsDavid Li1-4/+11
2015-12-20Convert simulator to new type aliasesDavid Li1-22/+21
2015-12-20Introduce type aliases for ISA thingsDavid Li1-13/+13
2015-12-20Fix compile errorsDavid Li1-3/+3
2015-12-20Implement logic for RV32I branch instructionsDavid Li1-1/+21
2015-12-20Set LSB of target to 0 in JALRDavid Li1-1/+4
2015-12-20Implement JAL, JALRDavid Li1-1/+8
2015-12-19Implement RV32I integer-immediate instructionsDavid Li1-10/+57
2015-12-18Implement RV32I integer-register instructionsDavid Li1-6/+143
2015-12-16Implement LWDavid Li1-3/+11
2015-12-16Implement ADDIDavid Li1-7/+24
2015-12-16Load and recognize a minimal set of instructionsDavid Li1-11/+38
2015-12-15Load hexdump of ELFDavid Li1-4/+4
2015-12-15Outline the simulatorDavid Li1-0/+58