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| author | David Li <li.davidm96@gmail.com> | 2015-12-27 09:27:23 -0700 |
|---|---|---|
| committer | David Li <li.davidm96@gmail.com> | 2015-12-27 09:27:23 -0700 |
| commit | 6fbeb4e5ec5f12916853f9a168d6a730992dd63e (patch) | |
| tree | 359d328b24ee2d68de72e976b222958a26883e69 /src/simulator.rs | |
| parent | ccac1d5977e913ef0d3317e3e3074912e6ba59b2 (diff) | |
Include fetch requests in cache
Diffstat (limited to 'src/simulator.rs')
| -rw-r--r-- | src/simulator.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/simulator.rs b/src/simulator.rs index 277e52f..f91ccbc 100644 --- a/src/simulator.rs +++ b/src/simulator.rs @@ -75,7 +75,7 @@ impl Simulator { }; let mut cores = vec![base_core; self.num_cores]; // hardcode GP - cores[0].registers.write_word(isa::Register::X3, 0x10860); + cores[0].registers.write_word(isa::Register::X3, 0x108D0); // hardcode SP cores[0].registers.write_word(isa::Register::X2, 0x7FFC); loop { |