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authorDavid Li <li.davidm96@gmail.com>2015-12-15 13:38:54 -0500
committerDavid Li <li.davidm96@gmail.com>2015-12-15 13:38:58 -0500
commit32b7dacc64b70c12096ecb4007465e41f3c2098a (patch)
tree91e1e1d3a11351c92ae8591d3fcac5d8361c7af1 /src/memory.rs
Outline the simulator
Diffstat (limited to 'src/memory.rs')
-rw-r--r--src/memory.rs21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/memory.rs b/src/memory.rs
new file mode 100644
index 0000000..854b0ea
--- /dev/null
+++ b/src/memory.rs
@@ -0,0 +1,21 @@
+use isa::{Instruction};
+
+pub struct Memory {
+ memory: Vec<u32>,
+}
+
+impl Memory {
+ pub fn new(size: usize) -> Memory {
+ Memory {
+ memory: Vec::with_capacity(size),
+ }
+ }
+
+ pub fn read_word(&self, address: usize) -> Option<u32> {
+ self.memory.get(address).map(Clone::clone)
+ }
+
+ pub fn read_instruction(&self, pc: usize) -> Option<Instruction> {
+ self.memory.get(pc).map(Clone::clone).map(Instruction::new)
+ }
+}