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authorDavid Li <li.davidm96@gmail.com>2015-12-20 18:34:56 -0500
committerDavid Li <li.davidm96@gmail.com>2015-12-20 18:34:56 -0500
commit68a0d8cb83d028421972750ab7514fd3a9d39fd1 (patch)
treeeb5f1b28f4fb7dee41a14e1ca1f1a06e46826ad4 /src/isa
parent2f788d140e94d5a020b90736796d7169fcb2eab8 (diff)
Convert simulator to new type aliases
Diffstat (limited to 'src/isa')
-rw-r--r--src/isa/mod.rs24
1 files changed, 13 insertions, 11 deletions
diff --git a/src/isa/mod.rs b/src/isa/mod.rs
index 086df74..6519a34 100644
--- a/src/isa/mod.rs
+++ b/src/isa/mod.rs
@@ -4,6 +4,8 @@ pub mod funct7;
pub type Word = u32;
pub type SignedWord = i32;
+
+// TODO: directly encode PC as u32, as architecturally specified
pub type Address = usize;
#[derive(Debug, PartialEq)]
@@ -128,31 +130,31 @@ impl Instruction {
Register::from_num((self.word >> 20) & 0x1F)
}
- pub fn i_imm(&self) -> i32 {
- (self.word as i32) >> 20
+ pub fn i_imm(&self) -> SignedWord {
+ (self.word as SignedWord) >> 20
}
- pub fn s_imm(&self) -> i32 {
+ pub fn s_imm(&self) -> SignedWord {
let low = (self.word >> 7) & 0x1F;
- let high = (((self.word as i32) >> 25) & 0x7F) as u32;
- ((high << 7) | low) as i32
+ let high = (((self.word as SignedWord) >> 25) & 0x7F) as Word;
+ ((high << 7) | low) as SignedWord
}
- pub fn uj_imm(&self) -> i32 {
+ pub fn uj_imm(&self) -> SignedWord {
// Want zero-extension
let low1 = (self.word >> 21) & 0x3FF;
let low11 = (self.word >> 20) & 0x1;
let low12 = (self.word >> 12) & 0xFF;
// Want sign-extension
- let low20 = (((self.word as i32) >> 30) & 0x1) as u32;
- ((low20 << 20) | (low12 << 12) | (low11 << 11) | (low1 << 1)) as i32
+ let low20 = (((self.word as SignedWord) >> 30) & 0x1) as Word;
+ ((low20 << 20) | (low12 << 12) | (low11 << 11) | (low1 << 1)) as SignedWord
}
- pub fn sb_imm(&self) -> i32 {
+ pub fn sb_imm(&self) -> SignedWord {
let low1 = (self.word >> 8) & 0xF;
let low5 = (self.word >> 25) & 0x3F;
let low11 = (self.word >> 7) & 0x1;
- let low12 = (((self.word as i32) >> 31) & 0x1) as u32;
- ((low12 << 12) | (low11 << 11) | (low5 << 5) | (low1 << 1)) as i32
+ let low12 = (((self.word as SignedWord) >> 31) & 0x1) as Word;
+ ((low12 << 12) | (low11 << 11) | (low5 << 5) | (low1 << 1)) as SignedWord
}
}