diff options
author | David Li <li.davidm96@gmail.com> | 2015-12-20 22:33:03 -0500 |
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committer | David Li <li.davidm96@gmail.com> | 2015-12-20 22:33:03 -0500 |
commit | 600fcc814e27e7f38969726e1263a36592bbde58 (patch) | |
tree | d8e9cc7d61ece33f40a8d552e442ef75e29702e1 /src/isa | |
parent | 398e6b6a3c7cc7efd579e00f6f65bde40e39d628 (diff) | |
parent | 68a0d8cb83d028421972750ab7514fd3a9d39fd1 (diff) |
Merge branch 'master' of git.lidavidm.me:rustv
Diffstat (limited to 'src/isa')
-rw-r--r-- | src/isa/funct3.rs | 7 | ||||
-rw-r--r-- | src/isa/mod.rs | 39 | ||||
-rw-r--r-- | src/isa/opcodes.rs | 2 |
3 files changed, 40 insertions, 8 deletions
diff --git a/src/isa/funct3.rs b/src/isa/funct3.rs index be2eafa..e74da96 100644 --- a/src/isa/funct3.rs +++ b/src/isa/funct3.rs @@ -16,6 +16,13 @@ pub const SRL_SRA: u32 = 0x5; pub const OR: u32 = 0x6; pub const AND: u32 = 0x7; +pub const BEQ: u32 = 0b000; +pub const BNE: u32 = 0b001; +pub const BLT: u32 = 0b100; +pub const BGE: u32 = 0b101; +pub const BLTU: u32 = 0b110; +pub const BGEU: u32 = 0b111; + pub const LW: u32 = 0x2; pub const SW: u32 = 0x2; diff --git a/src/isa/mod.rs b/src/isa/mod.rs index 0e3261b..6519a34 100644 --- a/src/isa/mod.rs +++ b/src/isa/mod.rs @@ -2,6 +2,12 @@ pub mod opcodes; pub mod funct3; pub mod funct7; +pub type Word = u32; +pub type SignedWord = i32; + +// TODO: directly encode PC as u32, as architecturally specified +pub type Address = usize; + #[derive(Debug, PartialEq)] pub enum Register { X0 = 0, @@ -84,6 +90,8 @@ impl Register { #[derive(Copy, Clone, Debug)] pub struct Instruction { + // TODO: rename word to something correct - instructions are not always a + // word word: u32, } @@ -122,14 +130,31 @@ impl Instruction { Register::from_num((self.word >> 20) & 0x1F) } - pub fn i_imm(&self) -> i32 { - (self.word as i32) >> 20 + pub fn i_imm(&self) -> SignedWord { + (self.word as SignedWord) >> 20 + } + + pub fn s_imm(&self) -> SignedWord { + let low = (self.word >> 7) & 0x1F; + let high = (((self.word as SignedWord) >> 25) & 0x7F) as Word; + ((high << 7) | low) as SignedWord + } + + pub fn uj_imm(&self) -> SignedWord { + // Want zero-extension + let low1 = (self.word >> 21) & 0x3FF; + let low11 = (self.word >> 20) & 0x1; + let low12 = (self.word >> 12) & 0xFF; + // Want sign-extension + let low20 = (((self.word as SignedWord) >> 30) & 0x1) as Word; + ((low20 << 20) | (low12 << 12) | (low11 << 11) | (low1 << 1)) as SignedWord } - pub fn s_imm(&self) -> i32 { - let word = self.word as i32; - let low = (word >> 7) & 0x1F; - let high = (word >> 25) & 0x7F; - (high << 7) | low + pub fn sb_imm(&self) -> SignedWord { + let low1 = (self.word >> 8) & 0xF; + let low5 = (self.word >> 25) & 0x3F; + let low11 = (self.word >> 7) & 0x1; + let low12 = (((self.word as SignedWord) >> 31) & 0x1) as Word; + ((low12 << 12) | (low11 << 11) | (low5 << 5) | (low1 << 1)) as SignedWord } } diff --git a/src/isa/opcodes.rs b/src/isa/opcodes.rs index e5763e3..56b9568 100644 --- a/src/isa/opcodes.rs +++ b/src/isa/opcodes.rs @@ -1,6 +1,6 @@ pub const BRANCH: u32 = 0x63; pub const JALR: u32 = 0x67; -pub const JAL: u32 = 0x68; +pub const JAL: u32 = 0x6F; pub const INTEGER_IMMEDIATE: u32 = 0x13; pub const INTEGER_REGISTER: u32 = 0x33; pub const LOAD: u32 = 0x3; |