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author | David Li <li.davidm96@gmail.com> | 2015-12-15 13:38:54 -0500 |
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committer | David Li <li.davidm96@gmail.com> | 2015-12-15 13:38:58 -0500 |
commit | 32b7dacc64b70c12096ecb4007465e41f3c2098a (patch) | |
tree | 91e1e1d3a11351c92ae8591d3fcac5d8361c7af1 /src/isa/mod.rs |
Outline the simulator
Diffstat (limited to 'src/isa/mod.rs')
-rw-r--r-- | src/isa/mod.rs | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/isa/mod.rs b/src/isa/mod.rs new file mode 100644 index 0000000..5e9a7dc --- /dev/null +++ b/src/isa/mod.rs @@ -0,0 +1,32 @@ +pub mod opcodes; + +enum Register { + X0 = 0, + X1 = 1, + X2 = 2, + X3 = 3, + X4 = 4, + X5 = 5, + X6 = 6, + X7 = 7, + X8 = 8, + X9 = 9, + X10 = 10, + X11 = 11, +} + +pub struct Instruction { + word: u32, +} + +impl Instruction { + pub fn new(word: u32) -> Instruction { + Instruction { + word: word, + } + } + + pub fn opcode(&self) -> u32 { + self.word & 0x7F + } +} |