From b06b9ad97e82ea66303c389f72454ff7a7297052 Mon Sep 17 00:00:00 2001
From: David Li <li.davidm96@gmail.com>
Date: Sat, 16 Jan 2016 10:10:48 -0700
Subject: Indent code block differently in readme

---
 README.md | 68 +++++++++++++++++++++++++++++++--------------------------------
 1 file changed, 33 insertions(+), 35 deletions(-)

diff --git a/README.md b/README.md
index 1a911e4..4a4097d 100644
--- a/README.md
+++ b/README.md
@@ -17,41 +17,39 @@ CacheRacer is written in Rust, and uses the RISC-V ISA.
 
 ## Example
 
-```
-RUST_LOG=debug cacheracer ./devkit/bin/test ./devkit/bin/masochist
-Traps set: 1
-INFO:cacheracer::shareable_cache: [memory] core 4: 1 write trap(s) set at address 3affffc,stalling for 100 cycles each
-Traps set: 1
-INFO:cacheracer::shareable_cache: [memory] core 5: 1 write trap(s) set at address 3affffd,stalling for 100 cycles each
-Traps set: 1
-INFO:cacheracer::shareable_cache: [memory] core 6: 1 write trap(s) set at address 3affffe,stalling for 100 cycles each
-Traps set: 1
-INFO:cacheracer::shareable_cache: [memory] core 7: 1 write trap(s) set at address 3afffff,stalling for 100 cycles each
-1048320
-INFO:cacheracer::shareable_cache: [memory] core 4: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
-INFO:cacheracer::shareable_cache: [memory] core 5: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
-INFO:cacheracer::shareable_cache: [memory] core 6: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
-INFO:cacheracer::shareable_cache: [memory] core 7: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
-1048320
-1048320
-Core ID > 1, sneak attacking
-DEBUG:cacheracer::system: [syscall] [memory] Secondary cache enabled for core 2
-1048320
-Core ID > 1, sneak attacking
-DEBUG:cacheracer::system: [syscall] [memory] Secondary cache enabled for core 3
-Team has reached payload goal, halting...
-Core 0: stalled 04323789 of 06970418 cycles (62.03%)
-Core 1: stalled 06000928 of 06970418 cycles (86.09%)
-Core 2: stalled 04323963 of 06970418 cycles (62.03%)
-Core 3: stalled 05162593 of 06970418 cycles (74.06%)
-Core 4: stalled 04000450 of 04000462 cycles (100.00%)
-Core 5: stalled 04000450 of 04000462 cycles (100.00%)
-Core 6: stalled 04000450 of 04000462 cycles (100.00%)
-Core 7: stalled 04000450 of 04000462 cycles (100.00%)
-16777216 cycles in 2.408722836000379 seconds (6965191.573414119 cycles/sec)
-Program 1 bytes written: 16777220
-Program 2 bytes written: 0
-```
+    RUST_LOG=debug cacheracer ./devkit/bin/test ./devkit/bin/masochist
+    Traps set: 1
+    INFO:cacheracer::shareable_cache: [memory] core 4: 1 write trap(s) set at address 3affffc,stalling for 100 cycles each
+    Traps set: 1
+    INFO:cacheracer::shareable_cache: [memory] core 5: 1 write trap(s) set at address 3affffd,stalling for 100 cycles each
+    Traps set: 1
+    INFO:cacheracer::shareable_cache: [memory] core 6: 1 write trap(s) set at address 3affffe,stalling for 100 cycles each
+    Traps set: 1
+    INFO:cacheracer::shareable_cache: [memory] core 7: 1 write trap(s) set at address 3afffff,stalling for 100 cycles each
+    1048320
+    INFO:cacheracer::shareable_cache: [memory] core 4: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
+    INFO:cacheracer::shareable_cache: [memory] core 5: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
+    INFO:cacheracer::shareable_cache: [memory] core 6: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
+    INFO:cacheracer::shareable_cache: [memory] core 7: 4 write trap(s) hit at address 3affffc,stalling for 1_000_000 cycles each
+    1048320
+    1048320
+    Core ID > 1, sneak attacking
+    DEBUG:cacheracer::system: [syscall] [memory] Secondary cache enabled for core 2
+    1048320
+    Core ID > 1, sneak attacking
+    DEBUG:cacheracer::system: [syscall] [memory] Secondary cache enabled for core 3
+    Team has reached payload goal, halting...
+    Core 0: stalled 04323789 of 06970418 cycles (62.03%)
+    Core 1: stalled 06000928 of 06970418 cycles (86.09%)
+    Core 2: stalled 04323963 of 06970418 cycles (62.03%)
+    Core 3: stalled 05162593 of 06970418 cycles (74.06%)
+    Core 4: stalled 04000450 of 04000462 cycles (100.00%)
+    Core 5: stalled 04000450 of 04000462 cycles (100.00%)
+    Core 6: stalled 04000450 of 04000462 cycles (100.00%)
+    Core 7: stalled 04000450 of 04000462 cycles (100.00%)
+    16777216 cycles in 2.408722836000379 seconds (6965191.573414119 cycles/sec)
+    Program 1 bytes written: 16777220
+    Program 2 bytes written: 0
 
 ## Contributing
 
-- 
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